Journals

A. Bankar, S. Shi, V. Chaturvedi, G. Quan,"Thermal Aware System-Wide Reliability Optimization for Automotive Distributed Computing Applications" IEEE Transactions on Vehicular Technology, 2022 (Accepted)

V. Rathore, V. Chaturvedi, A.K. Singh, T. Srikanthan, M. Shafique,"Longevity Framework: Leveraging Online Integrated Aging-Aware Hierarchical Mapping and VF-Selection for Lifetime Reliability Optimization in Manycore Processors" IEEE Transactions on Computers (TC) 2020 (Accepted)

Z. Zhu, W. Zhang, V. Chaturvedi, A.K. Singh, “Energy Minimization for Multi-core Platforms through DVFS and VR Phase Scaling With Comprehensive Convex Model” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Volume 39 issue 3 March 2020 pg 686-699

B. Zhou, W. Zhang, T. Srikanthan, V. Chaturvedi, “Cost-efficient Acceleration of Hardware Trojan Detection through Fan-out Cone Analysis and Weighted Random Pattern Technique”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 35, No. 5, pg. 792-805, April 2016

Y. Cui, V. Chaturvedi, W. Zhang, H. He, “Decentralized Thermal-aware Scheduling with Deadline Constraints for Large-scale Network-on-Chip”, IEEE Transactions on Very Large Scale Integration Systems, Vol. PP, pg. 1-14, November 2015

Y. Cui, V. Chaturvedi, W. Zhang, H. He, “Thermal-Aware Task Scheduling for 3D-Network-on-Chip:A Bottom to Top Scheme”, Journal of Circuits, Systems, and Computers Vol. 25, No. 1 (2016), October 2015

H. Huang, V. Chaturvedi, G. Quan, “Throughput Maximization for Periodic Real-Time Systems under the Maximal Temperature Constraint”, ACM Transactions on Embedded Computing Systems (TECS), Vol. 13, No. 2, pg. 1-19, 2014

V. Chaturvedi, H. Huang, S. Ren, G. Quan, “On the Fundamentals of Leakage Aware Real-Time DVS Scheduling for Peak Temperature Minimization”, Journal of Systems Architecture (JSA), Vol. 58, No. 10, pg. 387-397, 2012

H. Huang, V. Chaturvedi, G. Quan, “Leakage Aware Scheduling On Maximum Temperature Minimization For Periodic Hard Real-Time Systems” Journal of Low Power Electronics, Vol. 8, No. 4, pg. 378-393, 2012

G. Quan, V. Chaturvedi, “Feasibility Analysis for Temperature-Constraint Hard Real-time Periodic Tasks”, IEEE Transactions on Industrial Informatics (TII), Vol. 6, No. 3, pg. 329-339, 2010

Conferences

Akshara Ravi and  V. Chaturvedi,"Malware Analysis using ELF features for Linux based IoT devices", The 35th IEEE International Conference on VLSI Design (VLSID) 2022 (accepted)

A. Bankar, S. Shi, A., V. Chaturvedi, G. Quan,"Thermal Aware Lifetime Reliability Optimization for Automotive Distributed Computing Applications", The 38th IEEE International Conference on Computer Design (ICCD) 2020 (accepted)

H. Jain, S. Rathore, A. Rahoof T.P., V. Chaturvedi, S. Das,"Fast and Efficient Decision-based Attack for Deep Neural Network on Edge", The 34th IEEE International Workshop on Signal Processing Systems 2020 (accepted)

V. Rathore, V. Chaturvedi, A.K. Singh, T. Srikanthan and M. Shafique , " Towards Scalable Lifetime Reliability Management for Dark Silicon Mannycore Systems ", IEEE 26th  International Symposium on On-Line Testing and Robust System (IOLTS) 2019  (Invited Speaker), 03 October 2019

V. Rathore, V. Chaturvedi, A.K. Singh, T. Srikanthan and M. Shafique , " LifeGuard: A Reinforcement Learning-Based Task Mapping Strategy for Performance-Centric Aging Management ", IEEE/ACM/SIGDA 56th  Design, Automation Conference (DAC ) , 22 August 2019 (Top Tier Conference)

V. Rathore, V. Chaturvedi, A.K. Singh, T. Srikanthan and M. Shafique , " HiMap: Aging-aware Hierarchical Mapping Approach for Darksilicon Manycore Systems", IEEE/ACM/SIGDA 21st  Design, Automation & Test in Europe Conference & Exhibition (DATE ), pg 991 - 996 April 2018 (Top Tier Conference)

Rohith R, V. Rathore, V. Chaturvedi, A.K. Singh, T. Srikanthan and S.K. Lam ,” LifeSim: A Lifetime Reliability Simulator for Manycore Systems”, IEEE 8th Annual Computing and Communication Workshop and Conference (CCWC), pg 375-381, January 2018,  

Z. Zhu, V. Chaturvedi, A.K. Singh, W. Zhang and Y. Cui, "Two-stage Thermal-Aware Scheduling of Task Graphs on 3D Multi-cores Exploiting Application and Architecture Characteristics", IEEE 22nd Asia and South Pacific Design Automation Conference (ASP-DAC) 2017, pg.324-329

V. Rathore, V. Chaturvedi, T. Srikanthan,"Performance Constraint-Aware Task Mapping to Optimize Lifetime Reliability of Manycore Systems", ACM 16th Great Lakes Symposium on VLSI (GLSVLSI) 2016, pg. 377-380

V. Chaturvedi, B.K. Mohanty, T. Srikanthan, “Leakage-Aware Intra-Task Dynamic Voltage Scaling Technique for Energy Reduction in Real-Time Embedded Systems”, IEEE International Conference on Digital Signal Processing (DSP) 2015,  pg. 1266-1269

B.K. Mohanty, V. Chaturvedi, V. Rathore, T. Srikanthan, “Memory-Access Aware Work-Load Distribution for Peak-Temperature Reduction of 3D Multi-core Embedded Systems”, IEEE International Conference on Digital Signal Processing (DSP) 2015, pg. 1270-1273

V. Chaturvedi, A. Singh, W. Zhang, T. Srikanthan, “Thermal-Aware Task Scheduling for Peak Temperature Minimization under Periodic Constraint for 3D-MPSoCs”, IEEE Symposium on Rapid System Prototyping (RSP) 2014, pg. 107-113

Y. Cui, V. Chaturvedi, W. Zhang, H. He, “Thermal-aware Task Scheduling for 3D Network-on-Chip: A Bottom to Top Scheme”, IEEE International Symposium on Integrated Circuits (ISIC) 2014, pg.  224-227

M. Fan, V. Chaturvedi, S. Sha, G. Quan, “An Analytical Solution For Multi-Core Energy Calculation With Consideration Of Leakage And Temperature Dependency”, IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED 2013, 353-358

M. Fan, V. Chaturvedi, S. Sha, G. Quan, “Feasibility Analysis for Temperature Constrained Real-Time Scheduling on Multi-Core Platforms”, IEEE/ACM Design Automation Conference (wip-DAC), 2013

M. Fan, V. Chaturvedi, S. Sha, G. Quan, “Thermal-Aware Energy Minimization for Real-Time Scheduling on Multi-core Systems”, IEEE Real-Time Systems Symposium (WiP-RTSS), 2012

V. Chaturvedi, G. Quan, “Leakage Conscious DVS Scheduling for Peak Temperature Minimization”, IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), Yokohama, Japan, 2011 pg. 135-140 (Acceptance ratio: 30.7%)

V. Chaturvedi, P. Thanarungroj, C. Liu, G. Quan, “Validation of Scheduling Techniques to Reduce Peak Temperature on an Architectural Level Platform Set-up”, IEEE SoutheastCon, 2011, pg. 111-116

V. Chaturvedi, H. Huang, G. Quan, “Leakage Aware Scheduling On Maximal Temperature Minimization For Periodic Hard Real-Time Systems”, The 7th IEEE International Conference on Embedded Software and Systems (ICESS), Bradford, UK, June 29-July 01, 2010, pg. 1802-1809 (Acceptance ratio 28%)

Presentation and Talks

• ACM/IEEE DATE 2018, “HiMap: Aging-aware Hierarchical Mapping Approach for Darksilicon Manycore Systems”, Dresden, Germany, March 2018
• University of Guelph, “Secure and Reliable Manycore Computing Systems” Guelph, Canada, January 2018
• IEEE DSP 2015, “Leakage-Aware Intra-Task Dynamic Voltage Scaling Technique for Energy Reduction in Real-Time Embedded Systems” Singapore
• IEEE DSP 2015, “Memory-Access Aware Work-Load Distribution for Peak-Temperature Reduction of 3D Multi-core Embedded Systems” Singapore
• Real-Time Systems Symposium (WiP)-2012, “Thermal-Aware Energy Minimization for Real-Time Scheduling on Multi-core Systems”, San Juan, PR, USA
• ASP-DAC 2011, “Leakage Conscious DVS Scheduling for Peak Temperature Minimization”, Yokohama, Japan
• SoutheastCon 2011, “Validation of Scheduling Techniques to Reduce Peak Temperature on an Architectural Level Platform Set-up”, Nashville, TN, USA

Technical Review Services

• Senior Editor ACM Ubiquity
• TPC International Symposium on VLSI (ISVLSI, 2021-22)
• TPC VLSID 2021-22
• TPC International Symposium on VLSI (ISVLSI, 2020)
• TPC VLSID 2020
• TPC International Symposium on VLSI (ISVLSI, 2019)
• Reviewer IEEE-ESL Embedded Systems Letters (ESL)
• TPC for International Symposium on VLSI (ISVLSI, 2018)
• TPC for ICT: Big Data, Cloud and Security Conference (ICT-BDCS) 2017
• Reviewer IEEE Potentials
• Reviewer IEEE Transaction on VLSI (TVLSI)
• Reviewer IEEE Transactions on Parallel and Distributed Computing (TPDS)
• Reviewer IEEE Transactions on Multimedia
• Reviewer IEEE Transaction on Technology Computer Aided Design (TCAD)
• Reviewer IEEE Transaction on Computers (TC)
• Reviewer IEEE International Symposium on Circuits and Systems
• Reviewer Springer Circuits, Systems and Signal Processing
• IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC)
• IEEE  International Conference on Embedded and Real-Time Computing Systems and Applications
• International Conference on Embedded Software and Systems
• Frontier of Computer Science and Technology
• European Symposium on Algorithms

Collaborators:

• Prof. Gang Quan, Florida International University, Miami
• Prof. Thambipillai Srikanthan, Nanyang Technological University, Singapore
• Prof. Wei Zhang, Hong Kong University of Science and Technology, Hong Kong
• Prof. Muhammad Shafique, Vienna University of Technology (TU-Wien), Vienna
• Prof. Amit Kumar Singh, University of Essex
• Prof. Sharad Sinha, Indian Institute of Technology, Goa
• Prof. Lam Siew Kei, Nanyang Technological University, Singapore
• Dr. Alok Prakash, Nanyang Technological University, Singapore